SoftSig: Software-Exposed Hardware Signatures for Code Analysis and Optimization ∗ James Tuck‡ ‡ NC State University

Source URL: homes.cs.washington.edu

• Software optimization
• Software engineering
• Data types
• Primitive types
• Memoization
• CPU cache
• Lookup table
• Memory disambiguation
• Pointer
• Computing
• Computer programming
• Computer performance

Review: Thread package API • tid thread create (void (*fn) (void *), void *arg); - Create a new thread that calls fn with arg • void thread exit (); • void thread join (tid thread);

Source URL: www.scs.stanford.edu

• Computer architecture
• Computer hardware
• Transaction processing
• Central processing unit
• Linearizability
• CPU cache
• Parallel computing
• Thread
• Consistency model
• Computing
• Computer memory
• Concurrency control

I F W E WA N T TO M A K E I N TE L L I G E N T DIOMIDIS SPINELLIS some types of memory are more

Source URL: www.spinellis.gr

• Digital media
• CPU cache
• Memory hierarchy
• Cache
• Locality of reference
• Computer data storage
• Paging
• Random-access memory
• Dynamic random-access memory
• Computer memory
• Computer hardware
• Computing

do i: Two Hardware-Based Approaches for Deterministic Multiprocessor Replay By Derek R. Hower, Pablo Montesinos, Luis Ceze, Mark D. Hill, and Josep Torrellas

Source URL: homes.cs.washington.edu

• Central processing unit
• Parallel computing
• Chunk
• Process
• CPU cache
• Computer architecture
• Computing
• Computer hardware
• Computer memory

Dynamic programming in faulty memory hierarchies (cache-obliviously)∗ Saverio Caminiti1 , Irene Finocchi1 , Emanuele G. Fusco1 , and Francesco Silvestri2 1

Source URL: www.itu.dk

Dynamic programming in faulty memory hierarchies (cache-obliviously) S. Caminiti1 , I. Finocchi1 , E. G. Fusco1 , and F. Silvestri2 1 Computer Science Department, Sapienza University of Rome

Source URL: www.itu.dk

Main Memory Performance for Database Systems Kenneth A. Ross Columbia University 1

Source URL: hpts.ws

• Cache
• Central processing unit
• Computer architecture
• Classes of computers
• CPU cache
• SIMD
• Memory hierarchy
• In-memory database
• Processor register
• Computing
• Computer hardware
• Computer memory

G522REV. 1.1 ™

Source URL: www-01.ibm.com

• Central processing unit
• Computer memory
• Virtual memory
• Instruction set architectures
• Power Architecture
• CPU cache
• Translation lookaside buffer
• PowerPC
• Memory management unit
• Computer architecture
• Computer hardware
• Computing

On The Limits Of Cache Oblivious Matrix Transposition

Source URL: www.itu.dk

• Analysis of algorithms
• Cache-oblivious algorithm
• Information
• CPU cache
• Locality of reference
• Memory hierarchy
• Computer memory
• Cache
• Computing

part_P80_Cvary_T10_RAID5.eps

Source URL: www.nec-labs.com

• Cache
• RAID
• CPU cache
• Memory management
• Standard RAID levels
• Paging
• Computer data storage
• Lookup table
• Data buffer
• Computing
• Computer memory
• Computer hardware